The 23rd IEEE International Symposium on High-Performance Computer Architecture (HPCA 2017)

The 23rd IEEE International Symposium on High-Performance Computer Architecture

February 4 – 8, 2017

Austin, Texas, USA

Call for Papers

The 23th International Symposium on High-Performance Computer Architecture (HPCA-23) will include an industry session on the architecture of future systems technologies. The objective of this session is to provide a unique forum for industry participants to present their perspective on technical challenges facing future systems and discuss potential solutions. The discussion in this forum is expected to educate the wider computer architecture community on the challenges facing the industry and to encourage them to investigate solutions. The session will include a small number of papers selected based on depth and relevance to the HPCA audience.

Architects, designers and developers involved in some aspect of industrial computer systems design and development are invited to submit a paper describing new challenges, issues, and opportunities in the next-generation computer systems. Topics of interest include, but are not limited to:

  • Architectures for cloud, mobile, social, big data, and analytics
  • New computing and usage paradigms
  • Case studies and performance evaluation of real machines
  • Evaluation and benchmarking including new application domains
  • Heterogeneous computing: SoCs, CPU+GPU, and HW accelerators
  • Innovative architectural paradigms
  • Innovative hardware/software trade-offs
  • Design complexity and verification
  • Power, energy, and temperature
  • Systems reliability
  • Memory and storage systems
  • Interconnect and network interfaces
  • Parallelism from instruction, chip to system levels
  • Circuit technology: noise, process variation, and memory scaling
  • Issues with deeply scaled CMOS
  • Microarchitecture
  • Advanced compilation techniques

Accepted papers will appear in the HPCA proceedings, and the authors will present their work at the conference.

Submission Guidelines

Authors should submit an electronic copy of the full paper in PDF that does not exceed 11 pages + unlimited pages for references, using the same double-column format as the main track. Submissions must be unpublished and not submitted for publication elsewhere. Work that has already appeared in unpublished or informally published workshops proceedings, or as an IEEE Computer Architecture Letters paper, may be submitted. Submissions deadline is Aug 22th 2016 @ 5PM EST.

Submission Instructions

Please submit your full paper (no abstract pre-submission) to the following link:

Important Dates

Paper Submission 5PM EST,August 22, 2016
Notification October 12th, 2016
Symposium February 4th-8th, 2017

Industry Session Chair

  • Chris Wilkerson (Intel)

Program Committee

  • Alper Buyuktosunoglu (IBM)
  • Niket Choudhary (Qualcomm)
  • Khubaib Khubaib (Apple)
  • Shubu Mukherjee (Cavium)
  • Steve Reinhardt (AMD)
  • Jared Stark (Intel)
  • Ren Wang (Intel)